This is the first part of a multi part series of Blog posts. There are simply too many misperceptions about virtual platforms out there. The most common ones are about speed, accuracy and development effort. I will comment on those in upcoming posts. However, some misperceptions are about the type of software development which virtual platforms support.

A recent article called “Unified Verification for Hardware and Embedded Software Developers” Lauro Rizatti of Eve talks about the advantages of hardware assisted verification. And I fully agree … hardware assisted verification is an important process in the design flow. That’s why Synopsys acquired Synplicity and, more recently, the ChipIt business unit of ProDesign. There is one important but infortunately common misperception in the article, which needs correction:

“In recent years, a new breed of tools, collectively called virtual prototyping platforms based on a high-level of design abstraction, have been introduced in an attempt to start software validation well ahead of silicon availability. While some may have achieved the scope of jump-starting software development, they only address application programs that do not require an accurate representation of the underling hardware design. They fall short when testing the interaction of the embedded software with hardware, such as firmware, device drivers, operating systems and diagnostics. For this testing, embedded software developers need an accurate model of the hardware to validate their code, while hardware designers need fairly complete software to fully validate their application specific integrated circuit (ASIC) or SoC.”

So we could mince words here and look at the wording as referring to the “testing” aspect only, i.e. separating the development of embedded software from its testing. Perhaps that is meant. However, that would not properly represent the importance of virtual platforms in pre-silicon software development. While there is no “physical” proof for one or the other side here, our experience of more than 60 commercial virtual platforms in active use and developed using Synopsys’ tools (Innovator), models (DesignWare System-Level Library) and services, shows the situation as completely reverse to the quoted statement. While there is some application development, the majority of the software development on virtual platforms is spent on firmware, device drivers, operating system porting and diagnostics. And that is not – as one could assume – on cycle accurate models, but on functionally accurate models with only essential timing, the type of models called loosely timed (LT) in SystemC. In contrast, application software is developed more often than not using completely hardware independent techniques, including cross compilation from the host development machine using development kits like Apple’s iPhone development kit.

As indicated in this figure, the software layers closer to the hardware essentially provide an efficient abstraction layer, which allows to provide middle ware functions like codec calls and APIs which make the application development completely independent from the hardware registers. As a matter of fact, in product families like TI’s OMAP, NXPs nExperia or ST’s Nomadik, the intermediate layers provide abstraction in a way that the applications can be re-used without modification because the layers between the application and the hardware can be updated when the underlying hardware changes.

More specifically, this figure illustrates the schematic representation of a Mobile Chipset Hardware and its associated software stacks. The typical development tasks we have seen are outlined in the following table for the application subsystem and the modem subsystem, respectively.

Some of this has been publicly documented by examples with Texas Instruments, Freescale and Marvell, in which these development tasks were actually finished prior to silicon being available and when RTL was finally available, the OSs had been ported and the bring up took days instead of weeks or months.

So, before this escalates into a “Lauro said vs. Frank said” battle, I am the first one to admit again, that hardware assisted verification is important as part of the design flow. However, virtual and hardware based approaches both stand in their own right contributing lots of value. As I recently wrote here, they are best used in hybrid use models, combining the best of virtual and hardware assisted worlds.

So I hope I busted the first virtual platform myth here given the public examples and the experience from the more than 60 virtual platforms. Speed, accuracy and development effort myths look out, I’ll get to you soon …

As always, comments are highly appreciated. I look forward to your thoughts and reports on your experiences.