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A View From The Top is a Blog dedicated to System-Level Design and Embedded Software.  I started as developer of real-time software for musical instruments, then moved as hardware developer of about six multimedia chips up through the abstraction levels from gates to transactions. Not sure yet when mainstream design will adopt or even get beyond the transaction-level, but I am convinced that we will get there eventually! - Frank Schirrmeister Please also check out my monthly column “Systems to Silicon” in Electronic Design Magazine
Recent Posts
Posted by Frank Schirrmeister on June 22nd, 2009
You may remember this story from Red Hat. A couple of years ago I heard a presentation from a Red Hat representative, who was telling a story from the early days. At a time when Red Hat tried to figure out their business model, a couple of key executives went on an offsite and as part of that were kayaking in Colorado or another equally beautiful area. The guide they had taking care of them asked them after a while “so, what are y’all doing here, what line of work are you in”. The team apparently replied with “We are trying to find out how to sell free stuff”. Allegedly the guide thought for a while and then came back with “Well, good luck. Sounds hard!”.
Apparently it is still hard to make money with free stuff. Which brings me to Imperas and OVP. First I need a disclaimer: I have been their VP Marketing in 2006/2007. In my judgment their technology for processor modeling is cool and well thought out, probably the best I have seen so far – for processor modeling that is. They are also a partner for our System-Level Catalyst program here at Synopsys.
Imperas recently announced that they support the OSCI SystemC TLM-2.0 APIs. This - in my mind – has made them a valid player for processor models as SystemC TLM-2.0 is now the standards on which all vendors in the virtual platform space keep their models interoperable.
On the commercial side, Imperas recently announced some license changes:
Until now, OVPsim has been available on Linux to Imperas commercial customers only and was funded by their commercial contracts. We are now making OVPsim available on Linux to the wider OVP community.
To enable and fund this, from the new release, OVPsim will only be free for non-commercial usage. Commercial use of OVPsim on Windows or Linux will now require a commercial license from Imperas with pricing from $300/month per user. Commercial users can download and use the free OVPsim for evaluation purposes.
So this means that to simulate processor models, the price for the OVP offering just went from free on Windows (Linux was always charged for as the first sentence above shows) to $3600 per year per license on both platforms. This is an interesting step. Soon we will know, whether OVP users were actually interested in the openness of the APIs for processor modeling or in the aspect of free simulation. There is an interesting Blog post on this at Golden Pebbles, called “On Free, Open Source and VRM”, from which I borrowed the drawing on the left. I think the “free-ness” deserves an even bigger bubble in relationship to the “open-ness”, but time will tell. And when it comes to openness, the APIs for SystemC TLM-2.0 to enable model interoperability were open all along, so were the Freescale ADL descriptions for processor modeling, even prior to OVP.
Overall this is another interesting twist in the discussion where the value for vendors is in virtual platforms. Is it simulation? Or debugging? The models? The tools enabling virtual platform development? It looks like the concept of completely free simulation to enable other tools around it – like Imperas had indicated in an interview around the “Blue Ocean Strategy” – did not quite work out from a commercial perspective. It is an interesting experiment though.
Here at Synopsys our slogan has been for quite some time “it’s all about the models”. It has been the major driving thought for our DesignWare System-Level Library, which works in all SystemC compatible environments. More models being SystemC TLM-2.0 compatible – like the OVP models - can only help to further fuel adoption of SystemC based virtual platforms.
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Posted by Frank Schirrmeister on June 18th, 2009
OK, I admit feeling weird a little bit. I am at work, could be in my pajama’s for all the world cares and have talked to about 50 people by now. OK, it’s actually just Roger Waters’ “Amused to Death”. Quite a dark album. In a chat Grant Martin just pointed out “Whish you were here” is probable the Pink Floyd title of the hour, given that all participants of the Multicore Virtual Conference are not …
Intermediate feedback I get from participants is mixed. Some like it. Some struggle with the technology a little bit. Most of them happily interact virtually. Overall there are still 261 visitors in the auditorium and 399 in the auditorium / plaza. We had constantly between 10 and 15 people at the booth, I logged about 40 or so interesting conversations. That’s pretty good for a morning’s 3 hours of work from my office.
I am still here live blogging and answering questions at the virtual trade show … meet me at the Multicore Virtual Conference! It is quite a unique experience and a great spot to get lots of useful information at a single point collected into a virtual briefcase …
Back to virtual work!
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Posted by Frank Schirrmeister on June 18th, 2009
Being engaged in 20 conversations is not trivial. I better do take that speed typing class if this is the future of trade shows and conferences. I am engaged in about 20 conversations at which the messenger window gets kind of slow.
I like the auditorium though … a place to chill and listen. I will be on a panel later today at 1pm PDT, 4pm EDT on tools for multicore called “Tools: What are the Right tools for the Job (And do they Even Exist?)”.
Everyone talks about multicore but it seems nobody does anything about it. Where can a programmer start, and what does a system designer need to know? Multicore hardware is the easy part; where do the development tools come from? In this webinar we’ll meet the tool makers that are tackling these problems and see what treasures and hurdles await the unprepared designer.
I am still here live blogging and answering questions at the virtual trade show … meet me at the Multicore Virtual Conference!
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Posted by Frank Schirrmeister on June 18th, 2009

The numbers in the previous post are not additive.
I took these two screenshots within about 10 seconds. There is significant overlap in the “who’s here” window.
If you are on the plaza, then you are also in the Exhibit Hall it seems. And you can listen to the key note in parallel.
Talk about multi-tasking

Check out our demo videos at the Synopsys booth – Freescale i.MX31, TI OMAP 2420 and Synopsys USB 2.0 OTG …
Or sign up for a drawing of several $100 gift certificates when clicking on the button “Give Away”.
I am still here … meet me at the Multicore Virtual Conference!
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Posted by Frank Schirrmeister on June 18th, 2009
OK, 17 people at the booth now at 8:42. How can I talk to 17 people at once. People are just as reluctant as on a real trade show. I can pull up their profiles though and decide whom to focus on with targeted chats.
Unfortunately I can not see what they are looking at … this would be nice. So I am welcoming people one by one. This is getting interesting.
I can, BTW, listen to the key note in parallel while checking out what is going on at our booth. Try that on a real trade show. Still 343 people in the auditorium, 8 in the resource center, 548 on the show floor, 4 in the communication center and 550 on the plaza of the trade show. If this is cumulative then we have great attendance.
I am still here … meet me at the Multicore Virtual Conference!
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Posted by Frank Schirrmeister on June 18th, 2009
Funky! Kunle Olukotun, Professor of Electrical Engineering and Computer Science, Stanford University is giving the virtual key note in the virtual auditorium here at the Multicore Virtual Conference. Quite interesting. He is talking about how to regain the free lunch, which Herb Sutter of Microsoft coined a couple of years ago as “being over”
We’ll see. He is referring to transactional memory and some magic how to parallelize software.
I am still a bit distracted. The interesting aspect for me here is the conference itself. Things need getting used to … it is not trivial to find different locations as there are direct shortcuts between the exhibition and the auditorium.
However, we now have 350 virtual attendees at 8:23am. My colleague Filip Thoen and I are picking up people in direct conversations.
I am still here … meet me at the Multicore Virtual Conference!
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Posted by Frank Schirrmeister on June 18th, 2009
Well, today is the EETimes virtual multicore conference. While the auditorium is filling up here in the first minutes pre-key note (305 attendees at 8:03 am) I am reminiscing which work pajama to wear for this virtual experience.
They did not choose avatars for us afterall. I could upload mine as the picture in this post shows.
Visit me at the Synopsys booth in the virtual exhibit hall. I’ll be your friendly booth rep on the video screen
We’ll have lots of stuff at the booth … including 4 demo videos on i.mx31, multicore debug on TI OMAP and two videos on USB debug in our Synopsys USB IP. The organizers mentioned a pre-registration of more than 3000 users. At about 11 different booths this can be a busy morning ….
The login info is again here.
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Posted by Frank Schirrmeister on June 12th, 2009
OK, I admit it. I can be a skeptic at times. And until today I was a skeptic about one type of virtualization.
Don’t take me wrong, I am very bullish about virtualization when it comes to virtualization of embedded hardware to enable early software development. That’s one of the businesses my group is involved in and it works well. No, I was a skeptic on replacing real interactions with virtual interactions. That’s the type of interaction like in 2nd Life. I first ran across those virtual worlds when watching CSI New York and Detective Mac Taylor was hunting people though real and virtual worlds. All had pretty cool avatars, the virtual representations of themselves. Well, cool, I thought, but far away from what I am doing.
Well, it turns out that some of our trade shows are going virtual as well. Prominent examples are the Freescale Technology Forum – which I attended last year live – and which is this year coming to you as Virtual Freescale FTF. No travel involved! You can even wear your pajamas …
We at Synopsys decided to sponsor the EETImes Multicore Virtual Conference. It will happen next Thursday, June 18th 2009. You can register here. When we first asked my management for budget, I couldn’t help but being somewhat reserved. Today I reviewed the virtual booth and the virtual trade show floor and must say, I am very positively surprised. This actually may work well. The picture above shows the trade show setting. The little insert shows the Synopsys booth, which nicely scrolls in 3D before an skyline vaguely reminding me of San Francisco.
When you attend our actual booth, you will be welcomed by a setting like the second picture here. We recorded a video welcoming you. The video will give you an overview of our multi-core related offerings. We then can chat with each other and you can download whitepapers, datasheets and other resources. You even will be able to see a demo of our tools: We will showcase Innovator running a OMAP multicore platform and also some detailed demos on debugging USB software on our Synopsys USB 2.0 and 3.0 OTG cores.
So I am quite excited about this. I am pretty sure (and hopeful) that this type of virtualization will never completely overtake actual human to human interaction. In an environment of cost cutting and budget constraints, it sure is a great instrument for technical information exchange though.
The only item I am not certain about is the representation of all of us as avatars. So if I happen to have one – I am not sure, was never asked for a 3D rendering of my face – then I’ll be the one with the lion mask See you all (virtually) on Thursday, June 18th 2009 at the EETImes Multicore Virtual Conference.You can register here.
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Posted by Frank Schirrmeister on June 8th, 2009
There are a couple of things which impressed me permanently back in school. One of them is the realization of the superiority of cooperation over competition. No, this is not a post on world peace. It all started with an article called “Cooperation and Competition”. It was setting up a simple game. You are a producer of a good of any value, let’s say Slow Churned Rocky Road Ice Cream. You have a deal with a partner of yours, who is paying you with some other good of equal value, let’s say plain Chocolate ice cream - my 4 year old daughter’s favorite. You arrange for a time of exchange, but instead of meeting directly, you put your respective goods at two different places in a forest and then go to the other place and pick up the goods intended for you.
Of course it is tempting to not deliver your own goods and only take what was left for you. This way you get it all, the ice cream you were supposed to give and the ice cream the other person gave you. Well, this now all becomes very interesting when you do this as a series of events, like every week. What is the best strategy to win? Any thoughts? I spent countless hours on my Commodore 64 to figure it out. I even had local competitions with my friends to develop the best strategies on how to win. It was almost my dream to connect this to some evolution strategy simulation to identify who eventually would survive in a virtual society.
There were two main take aways from this and they stuck with me ever since. First, cooperation wins. If you always deliver your ice cream, everybody wins. However, there are of course the meanies and bullies who don’t deliver their ice cream. How to deal with them? Well, it turns out that the simplest strategy against them in this game with simple rules is “Tit for Tat”. Beat them back once and then switch to cooperation again.
 Founding System-Level Catalyst Members
I have been notably absent from this Blog with no posts for the last two weeks. The reason is that I was heavily involved in launching a cooperative partner program, launched today. It is called the System-Level Catalyst program and in the true spirit of my Rocky Road ice cream experience at school: It is all about cooperation. The program is meant to accelerate the adoption of system-level design and verification, in short to help ESL. It includes at this point 27 partners of our system-level solutions at Synopsys, the picture on the right here says it all!
The program is open to electronic design automation (EDA) vendors, intellectual property (IP) vendors, embedded software companies and service providers. It benefits our mutual customers by advancing tool and model interoperability and availability of system-level models and services. Our partners get access to Synopsys system-level and rapid prototyping products such as Innovator, DesignWare® System-Level Library, System Studio, Synplify® DSP and the ConfirmaTM platform. They can also use the System-Level Catalyst logo with their products or services to indicate system-level interoperability.
The partners can be lumped into three different categories: Models, Embedded Software and Verification. The specifics are pretty straight forward:
- IP providers and EDA vendors get access to and support for Synopsys tool and library offerings to validate and demonstrate interoperability of system-level models of their IP and their tool solutions
- Embedded software vendors get access to Synopsys’ Innovator and DesignWare System-Level Library to validate and demonstrate interoperability of debuggers
- Qualifying embedded software developers who specialize in the development of software for Synopsys DesignWare Cores get access to virtual platforms and Confirma rapid prototyping platforms for software development prior to silicon availability
- Training and services companies get access to Synopsys system-level tools in order to help system-level teams rapidly adopt the best practices for system-level design, virtual platforms, digital signal processing and FPGA-based rapid prototyping
I welcome you to check out the partner pages of the System-Level Catalyst Program and the 27 endorsements we got. Every partner has their own page on our websites (we have about 15 active at this point, the others will follow over the next couple of weeks), from which you can inquire on more information on the joint value our partners and us provide to you by clicking on the “tell me more link”.
Overall, I am convinced that cooperation wins! The system-level market’s growth and our customers’ adoption of system-level methodologies have been limited by severe market fragmentation and lack of model and tools interoperability. With the System-Level Catalyst Program, Synopsys is helping open up the system-level market to mainstream adoption, enabling new levels of interoperability.
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Posted by Frank Schirrmeister on May 5th, 2009
I have been writing about the advantages about SystemC TLM-2.0 in the context of virtual platforms quite a bit, for example at SystemC TLM-2.0: Why it is a big deal!.
Most importantly, for fast virtual platforms, the TLM-2.0 APIs make sure that we do not face a tower of Babel situation (See one of my favorite Bruegel’s drawing on the left). For the last decade or so the virtual platform vendors used proprietary APIs to build fast virtual platforms. Now they are all moving to TLM-2.0 APIs, which truly enables interoperability. At Synopsys we are the first having made the full transition – we have separated our virtual platform tools from the libraries. Our DesignWare System-Level Library runs in every SystemC compliant simulator, including the OSCI engine and the other virtual platform vendor’s engines.
At last DVCon OSCI recorded a three hour tutorial on TLM-2.0, which I would highly recommend. It describes in detail how TLM-2.0 defines the interoperability standard that allows model reuse for software development and performance analysis as well as architecture analysis. The actual features supported include generic transaction payload for memory mapped busses with payload extension mechanisms allowing users to instrument their virtual platforms with timing in loosely timed (LT) and approximately timed (AT) modes. The adoption of TLM-2.0 minimizes the need for bridges or adaptors to connect models together and it supports multiple, compatible abstraction levels. As a result users get high simulation speed, debug and analysis capabilities, and of course interoperability between vendors.
The detailed agenda is as follows:
Introduction and Welcome
Jack Donovan, President, XtremeEDA USA
Overview of TLM-2.0 Features
John Aynsley, Technical Director, Doulos
TLM Mechanics
David Black, ESL Technologist, XtremeEDA
TLM 2.0 Nuances
John Aynsley, Technical Director, Doulos
Performance Modeling Using TLM 2.0
Zhu Zhou, Component Design Engineer, Intel
Applying TLM 2.0 to Legacy Platforms
Frank Schirrmeister, Director, Product Marketing, System-Level Solutions, Synopsys
The tutorial is about three hours and can be found here. It is well worth the time investment!
Posted in Abstraction Levels, High Level Design Entry, Models | No Comments »
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