Resource Center: Case Studies
TSMC 90 nm
Targeting TSMC’s advanced 90 nm process technology, new IP for SRAM, 1T-RAM and Flash memory exceeded the capabilities of traditional verification tools. To account for the increased influence of interconnect on circuit performance, TSMC designers needed the ability to complete full-chip transistor-level post-layout simulations of their nanometer designs. HSIM’s advanced verification technology allowed TSMC designers to complete critical simulations in a fraction of the time required by earlier tools–and rapidly achieve working silicon in chips intended to prove out the advanced 90 nm technology and new memory IP designs. |
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Motorola: Mixed-Signal Verification Using NanoSim + VCS
This article addresses the challenges associated with verifying very large mixed-signal system-on-chip (SoC) designs and offers a detailed verification methodology using the NanoSim integration with VCS. This article also presents the results achieved on a mixed-signal SoC design using this verification methodology. |
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