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Power State Table Creation in UPF

Posted by gmaben on June 26th, 2008

Based on earlier feedback, lets take a quick look at functional power state table and see how we can convert this into UPF state Table

Given below is a picture of sample Functional Power State Table

Now if you look at the above table it shows that there are 3 power domains and could be in 8 different states if we consider the active/switchable power.

But above table tells us that, there are only 5 legal states and rest of the them are not valid or illegal. Now to convert this into UPF PST, we need to first define 3 power rails.

Lets say that these 3 are called VDD_core, VDD_domain1 and VDD_domain2 respectively. Given this first we need to define the legal voltage values for these rails

add_port_state VDD_core -state {TOP_on 0.864} -state {TOP_off off}
add_port_state VDD_domain1 -state {DOMAIN1_on 1.08} -state {DOMAIN1_off off}
add_port_state VDD_domain2 -state {DOMAIN2_on 0.864} -state {DOMAIN2_off off}

Above UPF says that legal voltage values are either 1.08,0.864 or off

Now lets create a table and define the name and the columns

create_pst SYSTEM_PST -supplies {VDD_core VDD_domain1 VDD_domain2}

Now lets add the valid states to the table

add_pst_state AllOff -pst SYSTEM_PST -state {TOP_off DOMAIN1_off DOMAIN2_off}
add_pst_state LP0 -pst SYSTEM_PST -state {TOP_on DOMAIN1_off DOMAIN2_off}
add_pst_state LP1 -pst SYSTEM_PST -state {TOP_on DOMAIN1_off DOMAIN2_on}
add_pst_state LP2 -pst SYSTEM_PST -state {TOP_on DOMAIN1_on DOMAIN2_off}
add_pst_state AllOn -pst SYSTEM_PST -state {TOP_on DOMAIN1_on DOMAIN2_on}

Hopefully this gives a clear picture on how a power state table can be represented in UPF.

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Interpretation of UPF during Power Planning

Posted by gmaben on June 10th, 2008

So far we have seen how UPF gets interpreted during synthesis and verification . Today lets look at how UPF gets interpreted during Floorplanning/Power Planning ? This is the most important phase in the design cycle, where power grid required for the design gets implemented physically to get the required functionality.

Main concerns here are

(a) If part of my design is going to be shut-down, how do I insert special cells in the power grid to cut-off power?

(b) How do I validate, whether my grid is beefed up enough to provide required amount of current to the circuit?

(c) How Many special cells are required to efficiently build the power grid ?

(d) How long will it take for the circuit to wake-up after recieving the wake-up signal ?

(e) Should I worry about the wake-up or shut-down sequence of switches as well as standard cells connected to the switches ?

(f) Which Part of the UPF conveys all these information?

First lets look at the UPF, which will be used by Floorplanning/Power Planning tools to implement the grid.

create_power_switch rx_sw \
-domain RECIEVER \
-input_supply_port {in VDD_LOW} \
-output_supply_port {out VDD_LOW_RX_VIRTUAL}\
-control_port {rx_sd power_controller/rx_sd}\
-on_state {rx_on_state in {!rx_sd}}

The above command says, we need to insert a switch in the domain reciever, whose input supply port is VDD_LOW and output of the switch is VDD_LOW_RX_VIRTUAL. All the components inside the domain reciever are going to be powered through the supply net “VDD_LOW_RX_VIRTUAL”. Now how do we know which switch cell to use?

this is specified through the UPF command

map_power_switch -domain RECIEVER -lib_cell rx_sw

In my next post, lets see how these get implemented physically and what part of the power plan can be automated.

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