Low Power Overview

Now is the time to explore the future of low-power design. As low power devices continue to become more abundant, it's paramount that collaboration and the free exchange of ideas take place. SoCDesignSource.org is committed to supplying the semiconductor industry with the intellectual capital and the discussion forum it needs to voice design concerns, industry developments and new innovations.

The New Low Power Imperative

Chip power densities became unsustainable in the late 1980s, and the industry had to reduce chip power drastically. Their answer? Out with bipolar technology, in with CMOS. This fundamental technology switch eliminated the power problem overnight, but today CMOS faces the same problem: chip-level power densities match the bipolar designs of years past. Something has to be done.

With no alternative semiconductor solution for power reduction, and as advanced processes introduce new power problems such as leakage, today power must be managed through design. Chip designers work to an almost universal specification. They have to meet the performance for the application and do it with the minimum power and area: PPA. In practice, this means using every trick in the book to minimize power dissipation without missing project milestones.

The message is clear: power is a pervasive chip-industry issue. Managing it requires a comprehensive low-power approach to the design process — from specification to signoff, from software to choice of semiconductor IP.

SocDesignSource.org is aimed at helping the design community understand and solve power-related issues in chip design. It is a knowledge center where engineers can learn from other designers and share best practices in chip power management. You drive all the content — we welcome your feedback, opinions, suggestions and criticisms.