Resource Center: Low Power Videos
Power Reduction: Is it Time to Re-examine Asynchronous Design?
Dr. Robert Damiano
Synopsys Fellow and Vice President, Advanced Technology Group
This presentation will introduce some existing methodologies for designing ICs that are free of global clock distribution networks. These ICs have lower power and are less sensitive to variation compared to their conventional counterparts. Research opportunities for new tools in this area will also be addressed.
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 Click here to download the presentation slides. (317 KB)
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