Synopsys Open Community Forums • View forum

BY DESIGN PHASE


System-Level Design Signal processing algorithm design, high-level synthesis, virtual platforms, mechatronics and wiring harness		Manufacturing Mask synthesis and data prep, lithography simulation and verification and yield management

Verification High-performance system, RTL, equivalence checking, and mixed-signal verification solutions		TCAD Process and device simulation solutions for technology development and manufacturing

Implementation & Sign-Off Advanced digital and custom IC and FPGA design solutions, including synthesis, physical implementation, test and sign-off		All Tools Directory of all Synopsys tools

Reduce Risk with High Quality IP


Interface and Standards IP Broad portfolio of interface IP such as USB, PCIe, DDR, SATA, HDMI and more		Verification IP Portfolio of standard bus interfaces such as USB, PCIe, SATA and more

Analog IP Portfolio of analog IP such as Data Converters, Audio Codecs, Video Analog Front Ends and more		minPower Components Low power datapath architectures and instantiable IP extends battery life in mobile applications and reduces power consumption for SoCs

DesignWare Library Library of design and verification IP: Datapath, AMBA, Star IP and more		Vertical Markets Data Center, Digital Home, Digital Office, Mobile Multimedia, Storage, Wireless

Helping You Address Your Toughest Design Challenges


Tool & Methodology Deployment Take full advantage of the latest tool features and methodologies		Verification Accelerate adoption of advanced verification methodologies

Flow Optimization Integrate proven flows and sub-flows to address your key design challenges		System-Level Modeling Build transaction-level models (TLMs) and virtual platforms for pre-silicon software development

Implementation Experts use the latest Synopsys technology, flows and infrastructure to help you get to tapeout

Solutions for Semiconductor and System Design


Eclypse Low Power Solution The perfect alignment of technology, methodology, IP, services, and industry standards to address advanced low power design		Discovery Verification Platform An integrated portfolio of functional, AMS, formal and low-power verification tools

Galaxy Implementation Platform A comprehensive solution for cell-based and custom IC implementation		Synplicity FPGA Design Solution Comprehensive toolsets, methodologies, and services to address FPGA design requirements

Industry Solutions Tailored solutions for automotive, mobile devices, memory & end-product categories		Lynx Design System A highly integrated, production-ready IC development platform

Expert Training and Support Services


Training Training courses on Synopsys� tools and methodologies		Global Support Centers Open a support issue online

SolvNet Get instant online access to the self-help support resources you need		Licensing, Installation & Compute Platforms The latest information about how to install, upgrade and manage your Synopsys licenses

Explore, Interact and Collaborate


Synopsys Users Group (SNUG) Technology users and product experts exchange ideas at SNUG conferences		University Program Resources for teaching IC design: how to apply to our program, curriculum, articles, support and training, and much more

Partners Collaborating to provide advanced reference flows, design kits, libraries, IP and methodology		Interoperability EDA tools working together for customer satisfaction and success

Blogs & Forums Insights from the experts, open forums for global Synopsys community

Synopsys: Innovation and Beyond


About Synopsys Discover our company, our management team and our values		Synopsys Careers Learn about jobs, internships and our commitment to diversity

Press Room Read Synopsys news, contact the PR team, download an image, or gather other information		Events Meet with Synopsys at an industry event, participate at a SNUG� conference , or attend a Synopsys workshop or seminar

Investor Relations Browse information for shareholders, analysts and potential investors		Community Involvement Learn how Synopsys inspires the next generation of technologists

HOME

COMMUNITY

BLOGS AND FORUMS

FORUMS

Synopsys User Forums

FAQ

It is currently Tue Feb 09, 2010 5:59 am

View unanswered posts | View active topics

Board index » Verification

All times are UTC - 8 hours

Forum		Topics	Posts	Last post
Mark forums read
	Meet Your Moderator(s) Bios of your moderators Moderator: Mike Bartley	1	1	Fri Dec 07, 2007 3:30 pm Synopsys_Ron
	Digital Verification Moderator: Mike Bartley	57	129	Wed Jan 20, 2010 1:29 am phoenixson
	AMS Verification This forum is used to discuss analog/mixed-signal simulation topics. Moderator: Synopsys_Bradley	6	13	Fri Jun 12, 2009 4:39 pm adielkhan_snps

Verification

Moderator: Mike Bartley

Page 1 of 1

[ 18 topics ]

Mark topics read

Topics

Author

Replies

Views

Last post

apple i[phone for sale

wallace089

Tue Feb 09, 2010 3:04 am

wallace089

For Sell Brand New Black Berry Storm 2 9520 270usd

lucas0091

Sun Feb 07, 2010 11:00 am

lucas0091

FOR SALE: BRAND NEW UNLOCKED APPLE IPHONE 3GS 32GB

telecoms

Fri Feb 05, 2010 10:59 am

telecoms

AHB verification problem

ukjklm

Wed Feb 03, 2010 12:55 am

ukjklm

VCS make error

moliel

246

Tue Feb 02, 2010 2:46 am

vipin

Brand new unlocked apple 3GS 32GB,Nokia N97 and many more

shopcool

Wed Jan 27, 2010 3:39 pm

shopcool

BlackBerry Bold 9700@$250,IPHONE 3GS 32GB@$230,HTC Smart@$32

nick01

Mon Jan 25, 2010 2:21 pm

nick01

Brand New T-Mobile myTouch 3G Fender Edition-$230,T-Mobile

AUTHUR

Wed Jan 20, 2010 7:44 am

AUTHUR

For sell brand New BlackBerry Bold 9700-$280,Nokia N97 mini

LANAPHONE

Sun Jan 17, 2010 6:56 pm

grace12

Buy Nokia N900 32GB Phone @ Yubha.com

yubha

Tue Dec 29, 2009 9:43 am

yubha

FOR SALE Apple iPhone 3GS 32GB- 240usd

sellphone1

118

Fri Dec 18, 2009 5:57 am

sellphone1

VCS error: Error-[RILIP] Register in low conn of input port

rashmikant

199

Mon Nov 02, 2009 10:28 am

rashmikant

VCS systemverilog coverage, no simv.vdb generated

rajat.asic

304

Fri Oct 02, 2009 4:51 am

rajat.asic

heating of a component in Hspice simulation

anduca

2910

Tue Sep 23, 2008 2:16 am

anduca

query on warning msg during synthesis with dc

cosmonutt

3199

Wed Sep 03, 2008 10:43 am

cosmonutt

How can i plot gain in hspice

tauhid035

3249

Mon Sep 01, 2008 3:25 am

tauhid035

how to use $exit in sv

reddy_bv

3335

Tue Jul 22, 2008 11:31 pm

reddy_bv

Advanced High-Level Verification Market Penetration

ipa4me

2999

Mon Mar 17, 2008 3:44 pm

ipa4me

Page 1 of 1

[ 18 topics ]

Board index » Verification

All times are UTC - 8 hours

Who is online

Users browsing this forum: No registered users and 1 guest

New posts	No new posts	Announcement
New posts [ Popular ]	No new posts [ Popular ]	Sticky
New posts [ Locked ]	No new posts [ Locked ]	Moved topic

You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot post attachments in this forum