| ARM Developers' Conference 2007 | |
Managing Power in 45nm and 65nm Designs
The adoption of 65nm and 45nm processes increases the importance of managing power and overall energy consumption, including static power dissipation. This presentation describes a design flow using a combination of Artisan physical IP and Synopsys’ Galaxy Platform tools. We also discuss the integration of the ARM Power Management Kit (PMK) which provides functionality to support aggressive management of dynamic and static power for deep-submicron designs. Implemented as standard cells, these functions include power gates, back bias cells, state retention flip-flops, level shifters, clamps, and isolation gates, into the Synopsys Low Power Flow within the Galaxy Design Platform.
Presented by Leah Schuth, Technical Marketing Manager, ARM
Jason Binney, Principal Corporate Application Engineer, Synopsys
Download PDF presentation [1MB]
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