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ARM  Developers' Conference 2007 ARM and Synopsys

Design and Verification of Ultra Low Power

This presentation describes the common challenges and solutions in the design and verification of SoCs striving for power and performance efficiency. In particular, we discuss how ARM's IEM technology can control power and performance, focusing on the integration of ARM cores, IEM technology, and the process of architecting and verifying a low power scheme using these components. We also provide guidance in the hardware and software partitioning of low power schemes.

Presented by Srikanth Jadcherla, Group Director of R&D, Synopsys
Prapanna Tiwari, Manager, Corporate Applications Engineer, Synopsys

Download PDF presentation [2MB]


  
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